SH-2A Datasheet, PDF (483/501 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Section 8 Pipeline Operation
(16) Floating-Point Operation Instructions (FDIV)
Instruction Types
FDIV FRm,FRn
FDIV DRm,DRn
Pipeline
• Single-Precision
↔ ↔ ↔ ↔ ↔ ↔ ↔ ↔ ↔ ↔ ↔ ↔ ↔ ↔ Slots
Instruction A
IF ID EX
: CPU pipeline
IF DF E1 ED ED ED ED ED ED ED ED E1 E2 SF : FPU pipeline
Next instruction
IF ID EX ⋅ ⋅ ⋅
IF DF EX NA SF
Instruction after next
IF ID EX ⋅ ⋅ ⋅
IF DF EX NA SF
: CPU pipeline
: FPU pipeline
: CPU pipeline
: FPU pipeline
• Double-Precision
↔ ↔ ↔ ↔ ↔ ↔ ↔ ↔ ↔ ↔ ↔ ↔ ↔ ↔ Slots
Instruction A
IF ID EX
: CPU pipeline
IF DF E1 E1 ED ⋅ ⋅ ⋅ ED E1 E1 E1 E2 SF : FPU pipeline
Next instruction
IF ID EX ⋅ ⋅ ⋅
: CPU pipeline
IF DF EX NA SF
: FPU pipeline
Instruction after next
IF ID EX ⋅ ⋅ ⋅
: CPU pipeline
IF DF EX NA SF
: FPU pipeline
Rev. 3.00 Jul 08, 2005 page 469 of 484
REJ09B0051-0300