SH-2A Datasheet, PDF (299/501 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Section 6 Instruction Descriptions
PINF : *FPUL = 0x7f800000; break;
NINF : *FPUL = 0xff800000; break;
qNaN : *FPUL = 0x7fbfffff; break;
sNaN :
set_V();
if((FPSCR & ENABLE_V) == 0) *FPUL = 0x7fbfffff;
else fpu_exception_trap(); break;
}
}
void normal_fcnvds(int m, float *FPUL)
{
int sign;
float abs;
union {
float f;
int l;
}
dstf,tmpf;
union {
double d;
int l[2];
}
dstd;
dstd.d = DR[m>>1];
if(dstd.l[1] & 0x1fffffff)) set_I();
if(FPSCR_RM == 1) dstd.l[1] &= 0xe0000000; /* round toward zero*/
dstf.f = dstd.d;
check_single_exception(FPUL, dstf.f);
}
FCNVDS Special Cases
FRn
+NORM –NORM +0 –0 +INF –INF qNaN sNaN
FCNVDS(FRn FPUL) FCNVDS FCNVDS +0 –0
Note: The value of a denormalized number is treated as 0.
+INF
–INF
qNaN Invalid
Rev. 3.00 Jul 08, 2005 page 285 of 484
REJ09B0051-0300