SH-2A Datasheet, PDF (170/501 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Section 6 Instruction Descriptions
6.3.36 STC
STore Control register
Store from Control Register
System Control Instruction
SH-2A/SH2A-FPU (New)
Format
STC TBR, Rn
Abstract
TBR → Rn
Code
0000nnnn01001010
Cycle
1
T Bit
―
Description
Stores data in control register TBR in a destination.
Operation
STCTBR(long n)
{
R[n]=TBR;
PC+=2;
}
/* STC TBR, Rn*/
Examples:
STC TBR,R0
; Before execution: R0 = H'12345678, TBR = H'00000000
; After execution: R0 = H'00000000
Rev. 3.00 Jul 08, 2005 page 156 of 484
REJ09B0051-0300