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SH-2A Datasheet, PDF (296/501 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH RISC engine Family | |||
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Section 6 Instruction Descriptions
if(DR[n>>1] == DR[m>>1])
return(EQ);
else if(DR[n>>1] > DR[m>>1]) return(GT);
else
return(LT);
}
}
void fcmp_invalid()
{
set_V();
T = 0;
if((FPSCR & ENABLE_V)==1) fpu_exception_trap();
}
FCMP Special Cases
FCMP/EQ
FRn,DRn
FRm,DRm NORM
+0
â0
+INF
âINF
NORM CMP
+0
EQ
â0
+INF
EQ
âINF
EQ
qNaN
sNaN
Note: The value of a denormalized number is treated as 0.
qNaN sNaN
!EQ
Invalid
FCMP/GT
FRn,DRn
FRm,DRm NORM
+0
â0
+INF
âINF
NORM CMP
GT
!GT
+0
!GT
â0
+INF
!GT
!GT
âINF
GT
!GT
qNaN
sNaN
Note: The value of a denormalized number is treated as 0.
UO means unordered. Unordered is treated as false (!GT).
qNaN
UO
sNaN
Invalid
Rev. 3.00 Jul 08, 2005 page 282 of 484
REJ09B0051-0300
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