SH-2A Datasheet, PDF (331/501 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Section 6 Instruction Descriptions
}
break;
case PZERO: break;
case NZERO: switch (data_type_of(n)){
case NZERO: zero(n,0); break;
default:
break;
}
break;
case PINF: switch (data_type_of(n)){
case PINF: invalid(n);
break;
default:
inf(n,1);
break;
} break;
case NINF: switch (data_type_of(n)){
case NINF: invalid(n);
break;
default:
inf(n,0);
break;
}
break;
}
}
FSUB Special Cases
FRm,DRm
FRn,DRn
NORM
+0
–0
+INF
–INF
NORM SUB
+INF
–INF
+0
–0
–0
+0
+INF
–INF
Invalid
–INF
+INF
Invalid
qNaN
sNaN
Note: The value of a denormalized number is treated as 0.
qNaN
qNaN
sNaN
Invalid
Possible Exceptions:
• Invalid operation
• Overflow
• Underflow
• Inexact
Rev. 3.00 Jul 08, 2005 page 317 of 484
REJ09B0051-0300