SH-2A Datasheet, PDF (69/501 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Section 5 Instruction Set
Compatibility
Instruction
Code
Operation
Cycles
T Bit
SH2E
SH4
New
SH-2A/
SH2A-
FPU
MOV.L @(R0, Rm), Rn
0000nnnnmmmm1110 (R0+Rm) → Rn
1
MOV.B R0, @(disp, GBR) 11000000dddddddd R0 → (disp+GBR)
1
MOV.W R0, @(disp, GBR) 11000001dddddddd R0 → (disp×2+GBR)
1
MOV.L R0, @(disp, GBR) 11000010dddddddd R0 → (disp×4+GBR)
1
MOV.B @(disp, GBR), R0 11000100dddddddd (disp+GBR) → sign extension 1
→ R0
MOV.W @(disp, GBR), R0 11000101dddddddd (disp×2+GBR) → sign
1
extension → R0
MOV.L @(disp, GBR), R0 11000110dddddddd (disp×4+GBR) → R0
1
MOV.B R0, @Rn+
0100nnnn10001011 R0 → (Rn), Rn + 1 → Rn
1
MOV.W R0, @Rn+
0100nnnn10011011 R0 → (Rn), Rn + 2 → Rn
1
MOV.L R0, @Rn+
0100nnnn10101011 R0 → (Rn), Rn + 4 → Rn
1
MOV.B @-Rm, R0
0100mmmm11001011 Rm - 1 → Rm, (Rm) → sign
1
extension → R0
MOV.W @-Rm, R0
0100mmmm11011011 Rm - 2 → Rm, (Rm) → sign
1
extension → R0
MOV.L @-Rm, R0
0100mmmm11101011 Rm - 4 → Rm, (Rm) → R0
1
MOV.B Rm, @(disp12, Rn) 0011nnnnmmmm0001 Rm → (disp+Rn)
1
― Yes Yes
― Yes Yes
― Yes Yes
― Yes Yes
― Yes Yes
― Yes Yes
― Yes Yes
―
Yes
―
Yes
―
Yes
―
Yes
―
Yes
―
Yes
―
Yes
0000dddddddddddd
MOV.W Rm, @(disp12, Rn) 0011nnnnmmmm0001 Rm → (disp×2+Rn)
1
―
Yes
0001dddddddddddd
MOV.L Rm, @(disp12, Rn) 0011nnnnmmmm0001 Rm → (disp×4+Rn)
1
―
Yes
0010dddddddddddd
MOV.B @(disp12, Rm), Rn 0011nnnnmmmm0001 (disp+Rm) → sign extension
1
―
Yes
0100dddddddddddd ^{→ Rn}
MOV.W @(disp12, Rm), Rn 0011nnnnmmmm0001 (disp×2+Rm) → sign
1
―
Yes
0101dddddddddddd ^{extension → Rn}
MOV.L @(disp12, Rm), Rn 0011nnnnmmmm0001 (disp×4+Rm) → Rn
1
―
Yes
0110dddddddddddd
MOVA @(disp, PC), R0 11000111dddddddd disp × 4 + PC → R0
1
MOVI20 #imm20, Rn
0000nnnniiii0000 imm → sign extension → Rn
1
― Yes Yes
―
Yes
iiiiiiiiiiiiiiii
MOVI20S #imm20, Rn
0000nnnniiii0001 imm<<8 → sign extension
1
―
Yes
iiiiiiiiiiiiiiii ^{→ Rn}
Rev. 3.00 Jul 08, 2005 page 55 of 484
REJ09B0051-0300