SH-2A Datasheet, PDF (211/501 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family

6.4.22 EXTS
Sign Extension
EXTend as Signed
Section 6 Instruction Descriptions
Arithmetic Instruction
Format
EXTS.B Rm, Rn
EXTS.W Rm, Rn
Abstract
Sign-extend Rm from byte → Rn
Sign-extend Rm from word → Rn
Code
Cycle T Bit
0110nnnnmmmm1110 1
—
0110nnnnmmmm1111 1
—
Description
Sign-extends general register Rm data, and stores the result in Rn. If byte length is specified, the
bit 7 value of Rm is copied into bits 8 to 31 of Rn. If word length is specified, the bit 15 value of
Rm is copied into bits 16 to 31 of Rn.
Operation
EXTSB(long m,long n)
/* EXTS.B Rm,Rn */
{
R[n]=R[m];
if ((R[m]&0x00000080)==0) R[n]&=0x000000FF;
else R[n]|=0xFFFFFF00;
PC+=2;
}
EXTSW(long m,long n)
/* EXTS.W Rm,Rn */
{
R[n]=R[m];
if ((R[m]&0x00008000)==0) R[n]&=0x0000FFFF;
else R[n]|=0xFFFF0000;
PC+=2;
}
Examples:
EXTS.B R0,R1
EXTS.W R0,R1
; Before execution: R0 = H'00000080
; After execution: R1 = H'FFFFFF80
; Before execution: R0 = H'00008000
; After execution: R1 = H'FFFF8000
Rev. 3.00 Jul 08, 2005 page 197 of 484
REJ09B0051-0300