SH-2A Datasheet, PDF (54/501 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Section 4 Instruction Features
Addressing Instruction
Mode
Format
PC relative disp:8
addressing
Effective Addresses Calculation
Formula
The effective address is the PC value sign-extended PC + disp × 2
with an 8-bit displacement (disp), doubled, and added
to the PC.
PC
disp
(sign-extended)
+
PC + disp 2
disp:12
2
The effective address is the PC value sign-extended PC + disp × 2
with a 12-bit displacement (disp), doubled, and added
to the PC.
PC
disp
(sign-extended)
+
PC + disp 2
Rn
Immediate #imm:20
addressing
2
The effective address is the register PC plus Rn.
PC
+
PC + R0
PC + Rn
R0
20-bit immediate data imm of MOVI20 instruction is —
sign-extended.
31
19
0
Sign extension
imm (20 bits)
20-bit immediate data imm of MOVI20S instruction —
is left-shifted 8 bits, upper part is sign-extended,
and lower part is zero-padded.
31 27
imm (20 bits)
8
0
00000000
Sign extension
Rev. 3.00 Jul 08, 2005 page 40 of 484
REJ09B0051-0300