SH-2A Datasheet, PDF (157/501 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family

6.3.28 NOTT
NOT Tbit
T Bit Inversion and Transfer
Format
NOTT
Abstract
~T→T
Section 6 Instruction Descriptions
Data Transfer Instruction
SH-2A/SH2A-FPU (New)
Code
0000000001101000
Cycle
1
T Bit
Operation
result
Description
Inverts the T bit, then stores the resulting value in the T bit.
Operation
NOTT (long n ) /*NOTT Rn */
{
if (T ==1) T=0;
else T=1;
PC+=2;
}
Examples:
SETT ;T = 1
NOTT ;T = 0
NOTT ;T = 1
Rev. 3.00 Jul 08, 2005 page 143 of 484
REJ09B0051-0300