SH-2A Datasheet, PDF (141/501 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family

6.3.20 MOV
MOVe reverse stack
Reverse Stack Transfer
Section 6 Instruction Descriptions
Data Transfer Instruction
SH-2A/SH2A-FPU (New)
Format
MOV.B R0, @Rn+
MOV.W R0, @Rn+
MOV.L R0, @Rn+
MOV.B @-Rm, R0
MOV.W @-Rm, R0
MOV.L @-Rm, R0
Abstract
R0 → (Rn), Rn + 1 → Rn
R0 → (Rn), Rn + 2→ Rn
R0 → (Rn), Rn + 4 → Rn
Rm - 1 → Rm
(Rm) → sign extension → R0
Rm - 2 → Rm
(Rm) → sign extension → R0
Rm - 4 → Rm
(Rm) → R0
Code
0100nnnn10001011
0100nnnn10011011
0100nnnn10101011
0100mmmm11001011
0100mmmm11011011
0100mmmm11101011
Cycle
1
1
1
1
T Bit
―
―
―
―
1
―
1
―
Description
Transfers a source operand to a destination.
Operation
MOVRSBP (long n) /* MOV.B R0, @Rn+*/
{
Write_Byte(R[n], R[0]);
R[n]+=1;
PC+=2;
}
MOVRSWP (long n) /* MOV.W R0, @Rn+*/
{
Write_Word(R[n], R[0]);
R[n]+=2;
PC+=2;
}
Rev. 3.00 Jul 08, 2005 page 127 of 484
REJ09B0051-0300