SH-2A Datasheet, PDF (307/501 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family

6.5.7 FLDI0
0.0 Load
Floating-point
LoaD Immediate 0.0
Section 6 Instruction Descriptions
Floating-Point Instruction
PR Format
0
FLDI0 FRn
1
—
Abstract
0x00000000 → FRn
—
Code
Cycle
1111nnnn10001101 1
—
—
T Bit
—
—
Description
When FPSCR.PR = 0, this instruction loads floating-point 0.0 (0x00000000) into FRn.
If FPSCR.PR = 1, the instruction is handled as an illegal instruction.
Operation
void FLDI0(int n)
{
FR[n] = 0x00000000;
pc += 2;
}
Possible Exceptions:
None
Rev. 3.00 Jul 08, 2005 page 293 of 484
REJ09B0051-0300