SH-2A Datasheet, PDF(389/501 Page) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family

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SH-2A Datasheet, PDF (389/501 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family

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Section 8 Pipeline Operation

Type

Category

Number Execution

of Stages States

Latency

Contention

Single-

Floating-

5

precision point

floating- operation

point

instructions

instructions (excluding

FDIV)

1

3 â¢ These instruc-

tions use the

FPU arithmetic

operation

pipeline.

5

Floating-

14

point

operation

13

instructions

(FDIV,

FSQRT)

Floating-

4

point

compare

instructions

1

0 â¢ These instruc-

tions use the

FPU load/store

pipeline.

1

12 â¢ These instruc-

1

11

tions use the

FPU arithmetic

operation

pipeline and

FPU division/

square root

extraction

pipeline.

1

2 â¢ These instruc-

tions use the

FPU arithmetic

operation

pipeline.

Instructions

FADD

FLOAT

FMAC

FMUL

FSUB

FTRC

FABS

FNEG

FRm,FRn

FPUL,FRn

FR0,FRm,FRn

FRm,FRn

FRm,FRn

FRm,FPUL

FRn

FRn

FDIV

FSQRT

FRm,FRn

FRn

FCMP/EQ FRm,FRn

FCMP/GT FRm,FRn

Rev. 3.00 Jul 08, 2005 page 375 of 484

REJ09B0051-0300

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