SH-2A Datasheet, PDF (101/501 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Section 6 Instruction Descriptions
Example
An example is shown using assembler mnemonics, indicating the states before and after execution
of the instruction.
Italics (e.g., .align) indicate an assembler control instruction. The meaning of the assembler
control instructions is given below. For details, refer to the Cross-Assembler User’s Manual.
.org
.data.w
.data.l
.sdata
.align 2
.align 4
.align 32
.arepeat 16
.arepeat 32
.aendr
Location counter setting
Word integer data allocation
Longword integer data allocation
String data allocation
2-byte boundary alignment
4-byte boundary alignment
32-byte boundary alignment
16-times repeat expansion
32-times repeat expansion
Count-specification repeat expansion end
Note: SH Series cross-assembler version 1.0 does not support conditional assembler functions.
Rev. 3.00 Jul 08, 2005 page 87 of 484
REJ09B0051-0300