SH-2A Datasheet, PDF (313/501 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Section 6 Instruction Descriptions
case PZERO:
case NZERO: switch (data_type_of(n)){
case qNaN: qnan(n); break;
case PZERO:
break;
case NZERO: zero(n,sign_of(0)^ sign_of(m)^sign_of(n));
default:
break;
}
case PINF:
case NINF: switch (data_type_of(n)){
case qNaN: qnan(n); break;
case PINF:
case NINF: if(sign_of(0)^ sign_of(m)^sign_of(n)) invalid(n);
else inf(n,sign_of(0)^ sign_of(m)); break;
default:
inf(n,sign_of(0)^ sign_of(m)); break;
}
case NORM: switch (data_type_of(n)){
case qNaN: qnan(n); break;
case PINF:
case NINF: inf(n,sign_of(n)); break;
case PZERO:
case NZERO:
case NORM: normal_fmac(m,n); break;
}
break;
case PZERO:
case NZERO: switch (data_type_of(m)){
case PINF:
case NINF: invalid(n); break;
case PZERO:
case NZERO:
case NORM: switch (data_type_of(n)){
case qNaN: qnan(n); break;
case PZERO:
case NZERO: zero(n,sign_of(0)^ sign_of(m)^sign_of(n)); break;
default: break;
Rev. 3.00 Jul 08, 2005 page 299 of 484
REJ09B0051-0300