SH-2A Datasheet, PDF (262/501 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Section 6 Instruction Descriptions
6.4.50 SETT
T Bit Setting
SET T bit
Format
SETT
Abstract
1→T
Description
Sets the T bit to 1.
Operation
SETT() /* SETT */
{
T=1;
PC+=2;
}
Example:
SETT ; Before execution:
; After execution:
T=0
T=1
System Control Instruction
Code
0000000000011000
Cycle
1
T Bit
1
Rev. 3.00 Jul 08, 2005 page 248 of 484
REJ09B0051-0300