SH-2A Datasheet, PDF (428/501 Pages) Renesas Technology Corp – Renesas 32-Bit RISC Microcomputer SuperH™ RISC engine Family

Section 8 Pipeline Operation
8.9.5 Branch Instructions
(1) Conditional Branch Instructions
Instruction Types
BF label
BT label
Pipeline
(a) When condition is met
Instruction A
Next instruction
Instruction after next
Second instruction
after next
Branch destination
instruction
↔ ↔ ↔ ↔ ↔ Slots
IF ID EX
IF — ⋅ ⋅ ⋅ (Fetched but discarded)
IF ⋅ ⋅ ⋅ (Fetched but discarded)
IF ⋅ ⋅ ⋅ (Fetched but discarded)
— IF ID EX ⋅ ⋅ ⋅
(b) When condition is not met
Instruction A
Next instruction
Instruction after next
Second instruction
after next
↔ ↔ ↔ ↔ ↔ Slots
IF ID EX
IF ID EX
IF ID EX ⋅ ⋅ ⋅
———
Operation
The pipeline ends after three stages: IF, ID, EX. Condition determination is performed in the ID
stage. Conditional branch instructions are not delayed branch instructions.
Rev. 3.00 Jul 08, 2005 page 414 of 484
REJ09B0051-0300