HD64570 Datasheet, PDF(72/469 Page) Hitachi Semiconductor – Serial Communications Adaptor

English

English German Russian Spanish Italian Polish Chinese Japanese Korean French Portuguese	Language :

HD64570 Datasheet, PDF (72/469 Pages) Hitachi Semiconductor – Serial Communications Adaptor

◁

Normal

operating

mode

Reset

mode

RESET = 0

System

stop

mode

Note: IOSTP is bit 0 in the low power register (LPR).

Figure 3.1 Chip Operating Mode Transitions

Table 3.1 indicates the operational status of the main functional modules in each of the operating

modes.

Table 3.1 Operational Status of On-Chip Functional Modules in Operating Modes

Operating Mode

Reset mode

Normal operating mode

System stop mode

Note: Â°: operation enabled

ï£§: operation disabled

On-Chip DMAC

ï£§

Â°

ï£§

Functional Module

MSCI

Timers

ï£§

ï£§

Â°

Â°

ï£§

ï£§

3.2.2 Low-Power Register (LPR)

The low-power register controls transition to system stop mode.

Rev. 0, 07/98, page 56 of 453

▷