HD64570 Datasheet, PDF (453/469 Pages) Hitachi Semiconductor – Serial Communications Adaptor

Address
Register
CPU CPU
Mode Mode
0, 1 2, 3 Remarks
DMAC (Channel 0)
DMA Command Register 95H 94H
Channel 0: DCR Channel 0
7
6
5
4
3
2
1
0
Single-block
transfer mode _—
—
—
—
—
— DCMD1DCMD0
Chained-block
transfer mode
Read/Write
Initial value
—— ————W W
—— ——————
Not used
Not used
Not used
Not used
Not used
Not used
Not used
Not used
Not used
Not used
96H
97H
98H
99H
9AH
9BH
9CH
9DH
9EH
9FH
97H
96H
99H
98H
9BH
9AH
9DH
9CH
9FH
9EH
Command specification
01: Software abort
10: Frame end interrupt
counter cleared
Others: Reserved
Rev. 0, 07/98, page 437 of 453