HD64570 Datasheet, PDF (153/469 Pages) Hitachi Semiconductor – Serial Communications Adaptor

Bit 7 (UDRN: Underrun Error): Indicates whether or not an underrun error has occurred in byte
or bit synchronous mode. (In asynchronous mode, underrun errors do not occur.) This bit is
cleared when 1 is written to this bit position.
• Asynchronous mode
Reserved. This bit always reads 0 and can be set to 0 or 1.
• Byte synchronous/Bit synchronous mode
UDRN = 0: Indicates that no underrun error has occurred
UDRN = 1: Indicates that an underrun error has occurred
Bit 6 (IDL: Transmitter Idle Status): Indicates whether or not the MSCI transmitter is in idle
state. This bit is cleared when the transmit data is written to the transmit buffer.
• Asynchronous/Byte synchronous/Bit synchronous mode
IDL = 0: Indicates that the transmitter is not in idle state
IDL = 1: Indicates that the transmitter is in idle state
Bit 5 (CLMD: Two-Clock Missing Detection): Indicates the detection of two missing clock
transitions in byte or bit synchronous mode when the FM codes and ADPLL are used. This occurs
when no level transition on the RXD line is detected in the search window twice in a row (two
clock cycles). If this bit is set to 1, the ADPLL automatically enters search mode.
• Asynchronous mode
Reserved. The value of this bit is undefined when read, and must be set to 0.
• Byte synchronous/Bit synchronous mode
Reserved. The value of this bit is undefined when read, and must be set to 0.
CLMD = 0: Indicates that missing level transitions have not been detected
CLMD = 1: Indicates that missing level transitions have been detected
Bit 4 (SYNCD/FLGD: SYN Pattern Detection/Flag Detection): Indicates whether or not
synchronization has been established in byte or bit synchronous mode. This bit is cleared when 1
is written to this bit position.
• Asynchronous mode
Reserved. This bit always reads 0 and can be set to 0 or 1.
• Byte synchronous mode
SYNCD = 0: Indicates that synchronization has not been established
SYNCD = 1: Indicates that synchronization has been established (SYN pattern detection in
mono-sync or bi-sync mode, or by the SYNC line input in external synchronous mode)
• Bit synchronous mode
FLGD = 0: Indicates that synchronization has not been established
FLGD = 1: Indicates that synchronization has been established (flag pattern detection)
Rev. 0, 07/98, page 137 of 453