HD64570 Datasheet, PDF (344/469 Pages) Hitachi Semiconductor – Serial Communications Adaptor

CMD fl 21H........................................ Resets channel.
MD0 fl 44H........................................ Specifies bi-sync mode.
Disables the auto-enable function.
Specifies CRC-16 mode, and presets to all 0s.
MD2 fl 00H........................................ Specifies the NRZ code.
Specifies full-duplex mode.
CTL fl 11H........................................ Specifies idle pattern transmission.
Specifies RTS line high-level output.
TRC0 fl 00H........................................ TXRDY bit = 1 when the transmit buffer is empty.
TRC1 fl 00H........................................ TXRDY bit = 0 when the transmit buffer is not empty.
TXS fl 00H........................................ Specifies TXC line input for the transmit clock.
IE0 fl 82H........................................ Enables TXINT interrupts.
Enables TXRDY interrupts.
IE1 fl 80H........................................ Enables underrun interrupts.
SA0 fl 16H........................................ Specifies a SYN character.
SA1 fl 16H........................................ Specifies a SYN character.
IDL fl XXH ...................................... Specifies a leading pad or SYN character.
CMD fl 02H........................................ Enables transmission.
TRB fl Transmit data......................... Transmits a leading pad, and a SYN character, followed
by transmit data.
CMD: Command register
MD0: Mode register 0
MD2: Mode register 2
CTL: Control register
TRC0: TX ready control register 0
TRC1: TX ready control register 1
TXS: TX clock source register
IE0: Interrupt enable register 0
IE1: Interrupt enable register 1
SA0: Synchronous/address register 0
SA1: Synchronous/address register 1
IDL: Idle pattern register
Transmit Processing Routine: Two examples of transmission processing routines are given in
figures 9.1 and 9.2.
Rev. 0, 07/98, page 328 of 453