HD64570 Datasheet, PDF (164/469 Pages) Hitachi Semiconductor – Serial Communications Adaptor

Data read
EOM
1 ST2
TRB
Receive
buffer
1
Status
FIFO
Status set
1
FST
TRB: TX/RX buffer register
ST2: Status register 2
FST: Frame status register
Figure 5.5 Frame Status Register (FST)
A frame end interrupt is generated when status data is set in FST. After the interrupt has been
generated, the status of the received frame can be read from FST.
This method is used for MPU data transfer. In this case, residual bit frame interrupt, abort end
frame interrupt, and CRC error interrupt must be disabled.
Rev. 0, 07/98, page 148 of 453