HD64570 Datasheet, PDF (114/469 Pages) Hitachi Semiconductor – Serial Communications Adaptor

4.3 Vector Output
Two types of vectors can be selected for output from the SCA. The vector is output on data bus
lines D₇ to D₀. (The output on lines D₁₅ to D₈ is undetermined.)
1. Fixed vector: An arbitrary 8-bit value can be set in the interrupt vector register (IVR) for
output as a fixed interrupt vector.
2. Modified vector: An arbitrary 2-bit value can be set in bits 7 and 6 of the interrupt modified
vector register (IMVR). The other six bits are modified according to the interrupt source. The
IMVR value is output as the interrupt vector.
These two types of vector output are selected by setting a bit in the interrupt control register
(ITCR). See section 4.2.3, Interrupt Control Register.
4.4 Acknowledge Cycle
Three types of acknowledge cycles can be selected for the SCA.
1. Non-acknowledge cycle: The data bus remains in the high-impedance state even when INTA
is driven active (low).
2. Single acknowledge cycle: The IVR or IMVR contents are output on the data bus at the first
active (low) INTA input (figure 4.2).
3. Double acknowledge cycle: The first active (low) INTA input is ignored; the data bus is left
in the high-impedance state. The IVR or IMVR contents are output on the data bus at the
second active (low) INTA input (figure 4.3).
If INTA goes low when no interrupt is requested (when INT is inactive), no vector is output.
Rev. 0, 07/98, page 98 of 453