HD64570 Datasheet, PDF (12/469 Pages) Hitachi Semiconductor – Serial Communications Adaptor

Section 3 System Controller ........................................................................................... 55
3.1 Overview............................................................................................................................ 55
3.2 Chip Operating Modes ...................................................................................................... 55
3.2.1 SCA Operating Modes ......................................................................................... 55
3.2.2 Low-Power Register (LPR).................................................................................. 57
3.2.3 Reset Mode........................................................................................................... 58
3.2.4 Normal Operating Mode ...................................................................................... 60
3.2.5 System Stop Mode................................................................................................ 60
3.3 Bus Arbiter ........................................................................................................................ 63
3.3.1 Overview .............................................................................................................. 63
3.3.2 Timing for Passing Bus Control ........................................................................... 64
3.3.3 Bus Control Passing ............................................................................................. 65
3.4 Bus Interface...................................................................................................................... 70
3.4.1 Overview .............................................................................................................. 70
3.4.2 Slave Mode Bus Cycle ......................................................................................... 71
3.4.3 Master Mode Bus Cycle ....................................................................................... 76
Section 4 Interrupt Controller ........................................................................................ 81
4.1 Overview............................................................................................................................ 81
4.2 Registers ............................................................................................................................ 83
4.2.1 Interrupt Vector Register (IVR) ........................................................................... 83
4.2.2 Interrupt Modified Vector Register (IMVR)........................................................ 83
4.2.3 Interrupt Control Register (ITCR)........................................................................ 84
4.2.4 Interrupt Status Register 0 (ISR0) ........................................................................ 86
4.2.5 Interrupt Status Register 1 (ISR1) ........................................................................ 88
4.2.6 Interrupt Status Register 2 (ISR2) ........................................................................ 90
4.2.7 Interrupt Enable Register 0 (IER0) ...................................................................... 92
4.2.8 Interrupt Enable Register 1 (IER1) ...................................................................... 94
4.2.9 Interrupt Enable Register 2 (IER2) ...................................................................... 96
4.3 Vector Output .................................................................................................................... 98
4.4 Acknowledge Cycle........................................................................................................... 98
4.5 Interrupt Sources and Vector Addresses............................................................................ 100
Section 5 Multiprotocol Serial Communication Interface (MSCI) .................... 101
5.1 Overview............................................................................................................................ 101
5.1.1 Functions .............................................................................................................. 101
5.1.2 Configuration and Operation................................................................................ 103
5.2 Registers ............................................................................................................................ 104
5.2.1 MSCI Mode Register 0 (MD0) ............................................................................ 105
5.2.2 MSCI Mode Register 1 (MD1) ............................................................................ 112
5.2.3 MSCI Mode Register 2 (MD2) ............................................................................ 115
5.2.4 MSCI Control Register (CTL).............................................................................. 118
Rev. 0, 07/98, page ii of 11