HD64570 Datasheet, PDF (244/469 Pages) Hitachi Semiconductor – Serial Communications Adaptor

the RXBR3−RXBR0 bits of the RX clock source register (RXS), and the BRATE7−BRATE6 bits
of mode register 1 (MD1).
Typical register set values and bit rates are listed in table 5.21.
Table 5.21 Register Set Values and Bit Rates in Asynchronous Mode
Bit Rate
(bps)
TMC BR
38400 

19200 

9600 

4800 

2400 47
0
1200 93
0
600
93
0
300
93
0
150
93
1
110
127 1
1.7898
f_CLK (MHz)
CM Deviation (%) TMC BR


1
1


1
1


1
2


1
3
1/16 −0.83
1
4
1/16 −0.25
1
5
1/32 −0.25
1
6
1/64 −0.25
1
7
1/64 −0.25
1
8
1/64 0.10
175 1
2.4576
CM Deviation (%)
1/32 0.00
1/64 0.00
1/64 0.00
1/64 0.00
1/64 0.00
1/64 0.00
1/64 0.00
1/64 0.00
1/64 0.00
1/64 −0.25
Rev. 0, 07/98, page 228 of 453