HD64570 Datasheet, PDF (461/469 Pages) Hitachi Semiconductor – Serial Communications Adaptor

Register
DMAC (Channel 2)
Byte Count Register
Channel 2: BCRL
Channel 2
Byte Count Register
Channel 2: BCRH
Channel 2
DMA Status Register
Channel 2: DSR
Channel 2
Address
CPU CPU
Mode Mode
0, 1 2, 3 Remarks
CEH CFH
H
L
15
87
0
CFH CEH
Single-block transfer
mode
Chained-block
transfer mode
BCRH
BCRL
D0H
D1H
7
6
5
4
3
2
Single-block
transfer mode
—— —
Chained-block ^EOT
——
transfer mode
EOM BOF COF
1
0
DE DWE
Read/Write
Initial value
R/W R/W R/W R/W —
0
0
0
0
0
— R/W W
0
0
1
End of transfer
0: Transfer not completed
1: Transfer completed
Counter overflow
• Chained-block
transfer
0: No error detected
1: Error detected
Buffer overflow/underflow
• Chained-block transfer
0: No error detected
1: Error detected
DMA enable
0: Disable
1: ^Enable
DE bit write enable
0: Enable
1: Disable
End of frame transfer
• Chained-block transfer
0: Frame transfer not completed
1: Frame transfer completed
Rev. 0, 07/98, page 445 of 453