HD64570 Datasheet, PDF (104/469 Pages) Hitachi Semiconductor – Serial Communications Adaptor

4.2.5 Interrupt Status Register 1 (ISR1)
The read-only interrupt status register 1 indicates the status of interrupt request sources. All bits
are cleared to 0 at a reset.
7
6
5
4
3
2
1
0
Bit name DMIB3 DMIA3 DMIB2 DMIA2 DMIB1 DMIA1 DMIB0 DMIA0
Read/Write
Initial value
R
R
R
R
R
R
R
R
0
0
0
0
0
0
0
0
DMA channel 3 interrupt B
0: Not requested
1: Requested
DMA channel 0 interrupt A
0: Not requested
1: Requested
DMA channel 3 interrupt A
0: Not requested
1: Requested
DMA channel 0 interrupt B
0: Not requested
1: Requested
DMA channel 2 interrupt B
0: Not requested
1: Requested
DMA channel 1 interrupt A
0: Not requested
1: Requested
DMA channel 2 interrupt A
0: Not requested
1: Requested
DMA channel 1 interrupt B
0: Not requested
1: Requested
Note: Initial values are the values after a hardware reset.
Bit 7 (DMIB3: DMA Channel 3 Interrupt B):
DMIB3 = 0: DMAC channel 3 is not requesting a DMIB interrupt.
DMIB3 = 1: DMAC channel 3 is requesting a DMIB interrupt.
Rev. 0, 07/98, page 88 of 453