HD64570 Datasheet, PDF (190/469 Pages) Hitachi Semiconductor – Serial Communications Adaptor

5.3 Operation
5.3.1 Asynchronous Mode
In asynchronous mode, a start bit and stop bit(s) are appended to the character before transmission
to synchronize character. In this mode, the transmission line is normally high (mark); when the
line goes low, that is, when a start bit is detected, data transmission starts.
The start bit is followed by data, which begins with the least significant bit (LSB), that is, bit 0.
The data may be optionally followed by a parity/MP bit. The data transmission ends with 1, 1.5,
or 2 stop bits.
Figure 5.10 shows the character format for asynchronous mode. In this mode, data is transmitted
and received in character units which may be 5 to 8 bits in length. When the character length is 5
to 7 bits, each received character is extended to 8 bits, by padding the high-order bits with 0s.
The PRTCL2−PRTCL0 bits of mode register 0 (MD0) specify asynchronous mode. The
TXCHR1−TXCHR0 and RXCHR1−RXCHR0 bits of mode register 1 (MD1) specify the character
length; the STOP1−STOP0 bits of MD0 specify the stop bit length (for details on how to set these
bits, see section 5.2.1, MSCI Mode Register 0 (MD0), and section 5.2.2, MSCI Mode Register 1
(MD1)); and the PMPM1−PMPM0 bits of MD1 specify the parity/MP bit setting. In
asynchronous mode, only the NRZ type code is available.
Start bit
1 bit
D₀
D₁
Idle state
D_n
Parity/
MP bit
(mark)
Stop bit(s)
5, 6, 7, or 8 bits
0 or 1 bit
Unit of data
1, 1.5, or 2 bits
Figure 5.10 Character Format for Asynchronous Mode
Rev. 0, 07/98, page 174 of 453