HD64570 Datasheet, PDF (172/469 Pages) Hitachi Semiconductor – Serial Communications Adaptor

Bit 3 (OVRNE: OVRN Interrupt Enable): The function of this bit is described below.
• Asynchronous/Byte synchronous/Bit synchronous mode
OVRNE = 0: Disables an interrupt set by the OVRN bit of ST2
OVRNE = 1: Enables an interrupt set by the OVRN bit of ST2; the RXINT bit of ST0 is set to
1 when the OVRN and OVRNE bits are both 1
Bit 2 (CRCEE: CRCE interrupt enable): The function of this bit is described below.
• Asynchronous mode
Reserved. This bit always reads 0 and must be set to 0.
• Byte synchronous/Bit synchronous mode
CRCEE = 0: Disables an interrupt set by the CRCE bit of ST2
CRCEE = 1: Enables an interrupt set by the CRCE bit of ST2; the RXINT bit of ST0 is set to
1 when the CRCE and CRCEE bits are both 1
Bits 1−0: Reserved. These bits always read 0 and must be set to 0.
Rev. 0, 07/98, page 156 of 453