HD64570 Datasheet, PDF (463/469 Pages) Hitachi Semiconductor – Serial Communications Adaptor

Address
Register
CPU CPU
Mode Mode
0, 1 2, 3 Remarks
DMAC (Channel 2)
7
6
5
4
3
2
1
0
DMA Command Register D5H D4H ^Single-block
Channel 2: DCR
transfer mode _—
—
—
—
—
— DCMD1DCMD0
Chained-block
Channel 2
transfer mode
Read/Write
Initial value
—— ————W W
—— ——————
Not used
Not used
Not used
Not used
Not used
Not used
Not used
Not used
Not used
Not used
D6H
D7H
D8H
D9H
DAH
DBH
DCH
DDH
DEH
DFH
D7H
D6H
D9H
D8H
DBH
DAH
DDH
DCH
DFH
DEH
Command specification
01: Software abort
10: Frame end interrupt
counter cleared
Others: Reserved
Rev. 0, 07/98, page 447 of 453