HD64570 Datasheet, PDF(351/469 Page) Hitachi Semiconductor – Serial Communications Adaptor

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HD64570 Datasheet, PDF (351/469 Pages) Hitachi Semiconductor – Serial Communications Adaptor

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Transmission Processing Routine: An example of a transmission processing routine is given in

figure 9.5.

Start

Underrun error

Read ST1

Analyze interrupt source

Process interrupt, reset ST1

Issue EI instruction

Return

ST1: Status register 1

Note: An interrupt is also generated when the DMAC

completes the transmission of a frame.

Figure 9.5 TXINT Interrupt Processing Routine (using HD64180)

9.1.5 Reception in DMA Chained-Block Transfer Mode (Bit Synchronous HDLC Mode)

Initialization: An example of an initialization program is given below.

CMD ï¬ 21H........................................ Resets channel.

MD0 ï¬ 87H........................................ Specifies bit synchronous HDLC mode.

Specifies CRC-CCITT mode, and presets to all 1s.

MD1 ï¬ 40H........................................ Specifies single address 1.

MD2 ï¬ 00H........................................ Specifies the NRZ code.

Specifies full-duplex mode.

CTL ï¬ 01H........................................ Specifies FCS no-load.

RRC ï¬ 00H........................................ RXRDY = 1 when the receive buffer is not empty.

RXS ï¬ 00H........................................ Specifies RXC line input for the receive clock.

IE0 ï¬ 40H........................................ Enables RXINT interrupts.

IE1 ï¬ 03H........................................ Enables abort detection interrupts.

Rev. 0, 07/98, page 335 of 453

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