HD64570 Datasheet, PDF (222/469 Pages) Hitachi Semiconductor – Serial Communications Adaptor

5.4 Transmit/Receive Clock Sources
5.4.1 Overview
The MSCI transmit and receive clock sources are selected from the following:
• Transmit clock sources:
 TXC line input
 Transmit baud rate generator output
 Receive clock
The transmit clock source is selected by the TXCS2−TXCS0 bits of the TX clock source
register (TXS).
• Receive clock sources
 RXC line input
 Receive baud rate generator output
 RXC line input with noise suppressed by the ADPLL (the ADPLL operating clock =
receive baud rate generator output )
 Clock extracted from the receive data by the ADPLL (the ADPLL operating clock = RXC
line input or the receive baud rate generator output)
The receive clock source is selected by the RXCS2−RXCS0 bits of the RX clock source
register (RXS).
The internal baud rate generator (BRG) can provide independent outputs for transmission and
reception by dividing the system clock. The internal ADPLL can extract clock from the receive
data; suppress noise in the receive data; and suppress noise in the receive clock.
The ADPLL employs the receive BRG output or RXC line input for both clock extraction and
noise suppression. The ADPLL uses the receive BRG output for receive clock noise suppression.
The MSCI clock sources are shown in figure 5.29.
Rev. 0, 07/98, page 206 of 453