HD64570 Datasheet, PDF (208/469 Pages) Hitachi Semiconductor – Serial Communications Adaptor

The transmitter transmits a 16-bit CRC code. If data remains in the transmit buffer after
transmission, the transmitter enters SYN1 wait state. If no data remains, it enters idle state.
(CRC code is specified with the CRC1−CRC0 bits of MD0. Whether to perform CRC
calculation and to send the result is specified with the CRCCC bit of MD0. For details, see
section 5.2.1, MSCI Mode Register 0 (MD0).)
Initialization by
reset
"Channel reset" or "TX reset"
issued in any state
TX disable
state
"TX enable" issued
"TX disable" issued
and no data remaining
in transmit buffer
No data remaining in transmit buffer
and "TX disable" not issued
Idle
state
No data in transmit buffer
Underrun state and
Data remaining in
transmit buffer
UDRNC = 0, "EOM" issued
and CRCCC = 0, or
underrun state and
UDRNC = 1 and CRCCC = 0
Mono-sync,
external
synchro-
SYN1
transmit state
nization
Character
transmit state
"EOM" issued
CRC transmit
state
and CRCCC = 1, or
underrun state and
Bi-sync
UDRNC = 1 and
Data remaining _{CRCCC = 1}
in transmit buffer
and "EOM" not
issued
After SYN2 transmission
SYN2
transmit state
Data remains in transmit buffer
UDRNC: Underrun state control bit (control register (CTL) bit 5)
CRCCC: CRC calculation bit (mode register 0 (MD0) bit 2)
EOM: End of message command
Note: Command names are enclosed in double quotation marks ("").
Figure 5.24 State Transition Diagram for Transmission in Byte Synchronous Mode
Rev. 0, 07/98, page 192 of 453