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HD64570 Datasheet, PDF (116/469 Pages) Hitachi Semiconductor – Serial Communications Adaptor
4.5 Interrupt Sources and Vector Addresses
The interrupt modified vector register (IMVR) is an eight-bit register in which the six low bits
(bits 5 to 0) hold a hardware-generated code identifying an interrupt source, as listed in table 4.2.
The two high bits (bits 7 and 6) can be set to arbitrary values by the MPU.
Table 4.2 Interrupt Sources and Vector Addresses
Priority*1
Vector Address
VOS*2 VOS*2 Programmabl Hardware-Generated Code
=0 =1
e
No. Interrupt Source
1 MSCI channel 0 RXRDY 1
9
b7
b6
b5 b4 b3 b2 b1 b0
×
×
000100
2 MSCI channel 0 TXRDY 2
10
×
×
000110
3 MSCI channel 0 RXINT 3
11
×
×
001000
4 MSCI channel 0 TXINT 4
12
×
×
001010
5 MSCI channel 1 RXRDY 5
13
×
×
100100
6 MSCI channel 1 TXRDY 6
14
×
×
100110
7 MSCI channel 1 RXINT 7
15
×
×
101000
8 MSCI channel 1 TXINT 8
16
×
×
101010
9 DMAC channel 0 DMIA0 9
1
×
×
010100
10 DMAC channel 0 DMIB0 10 2
×
×
010110
11 DMAC channel 1 DMIA1 11 3
×
×
011000
12 DMAC channel 1 DMIB1 12 4
×
×
011010
13 DMAC channel 2 DMIA2 13 5
×
×
110100
14 DMAC channel 2 DMIB2 14 6
×
×
110110
15 DMAC channel 3 DMIA3 15 7
×
×
111000
16 DMAC channel 3 DMIB3 16 8
×
×
111010
17 Timer channel 0 T0IRQ 17 17
×
×
011100
18 Timer channel 1 T1IRQ 18 18
×
×
011110
19 Timer channel 2 T2IRQ 19 19
×
×
111100
20 Timer channel 3 T3IRQ 20 20
×
×
111110
(×: Arbitrary value)
Notes: 1. Smaller priority values indicate higher priority. Larger priority values indicate lower
priority.
2. The VOS bit in the interrupt control register (ITCR).
Rev. 0, 07/98, page 100 of 453