HD64570 Datasheet, PDF (250/469 Pages) Hitachi Semiconductor – Serial Communications Adaptor

Table 5.22 Register Set Values and Bit Rates in Byte Synchronous/Bit Synchronous Mode
(cont)
Bit Rate
(bps)
6.144
f_CLK (MHz)
8
9.216
TMC BR Deviation (%) TMC BR Deviation (%) TMC BR Deviation (%)
38400 80 1 0.00
104 1 0.16
120 1 0
19200 80 2 0.00
104 2 0.16
120 2 0
9600 80 3 0.00
104 3 0.16
120 3 0
4800 80 4 0.00
104 4 0.16
120 4 0
2400 80 5 0.00
104 5 0.16
120 5 0
1200 80 6 0.00
104 6 0.16
120 6 0
600 80 7 0.00
104 7 0.16
120 7 0
300 80 8 0.00
104 8 0.16
120 8 0
Bit Rate
(bps)
9.8304
f_CLK (MHz)
10
12
TMC BR Deviation (%) TMC BR Deviation (%) TMC BR Deviation (%)
38400 128 1 0
130 1 0.16
156 1 0.16
19200 128 2 0
130 2 0.16
156 2 0.16
9600 128 3 0
130 3 0.16
156 3 0.16
4800 128 4 0
130 4 0.16
156 4 0.16
2400 128 5 0
130 5 0.16
156 5 0.16
1200 128 6 0
130 6 0.16
156 6 0.16
600 128 7 0
130 7 0.16
156 7 0.16
300 128 8 0
130 8 0.16
156 8 0.16
TMC: Value of the TMC7−TMC0 bits of TMC
BR: Value of the TXBR3−TXBR0 bits of TXS or the RXBR3−RXBR0 bits of RXS
Rev. 0, 07/98, page 234 of 453