HD64570 Datasheet, PDF (197/469 Pages) Hitachi Semiconductor – Serial Communications Adaptor

The timing of sampling receive data is shown in figures 5.16 (a) and (b). This example uses an
8-bit character and one stop bit, with parity.
Receive data
Sampling
D₀
D₇
P
Start bit search
Character assembly
Start bit search
Stop bit check
Start bit detected
P: Parity bit
(a) 1/1 Clock Mode
Receive data
D₀
D₁
D₆
D₇
P
Sampl-
ing
Start bit search
Start bit check
Character assembly
Space detected
Start bit search
Stop bit check
P: Parity bit
(b) 1/16, 1/32, or 1/64 Clock Mode
Figure 5.16 Receive Data Sampling Timing
Rev. 0, 07/98, page 181 of 453