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HD64570 Datasheet, PDF (134/469 Pages) Hitachi Semiconductor – Serial Communications Adaptor | |||
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7
Async
â*
Byte sync
Bit sync HDLC
6
5
4
â* â* â*
UDRNC IDLC
3
2
1
BRK â * â *
â * SYNCLD
â*
0
RTS
Read/Write
â â R/W R/W R/W R/W R/W R/W
Initial value
0
0
0
0
0
0
0
1
Send break
⢠Asynchronous
mode
0: Off
1: On (break send)
Idle state control
⢠Byte/Bit synchronous mode
0: Transmits a mark
1: Transmits an idle pattern
Request to send
0: Sets RTS low
1: Sets RTS high
Underrun state control
⢠Byte synchronous mode
0: Enters idle state immediately
1: Enters idle state after CRC transmission
⢠Bit synchronous mode
0: Enters idle state after aborting transmission
1: Enters idle state after FCS and flag transmission
SYN character
load enable
⢠Byte synchronous mode
0: Disable
1: Enable
Note: Reserved. These bits always read 0 and must be set to 0.
Rev. 0, 07/98, page 118 of 453
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