HD64570 Datasheet, PDF (125/469 Pages) Hitachi Semiconductor – Serial Communications Adaptor

DMA read cycle
T1
T2
T3
CLK
RD
RTS
CLK
(f) CPU Mode 0, DMA Read Cycle
DMA read cycle
T1
T2
T3
RD
RTS
(g) CPU Mode 1, DMA Read Cycle
DMA read cycle
T1
T2
T3
CLK
HDS, LDS
R/W
RTS
(h) CPU Mode 2 and 3, DMA Read Cycle
Figure 5.1 Modem Control Signal Timing (cont)
Rev. 0, 07/98, page 109 of 453