HD64570 Datasheet, PDF (249/469 Pages) Hitachi Semiconductor – Serial Communications Adaptor

Byte synchronous/Bit synchronous mode: In byte or bit synchronous mode, the bit rate is
selected with the TMC7−TMC0 bits of TMC, the TXBR3−TXBR0 bits of TXS, and the RXBR3−
RXBR0 bits of RXS.
Typical register set values and bit rates are listed in table 5.22.
Table 5.22 Register Set Values and Bit Rates in Byte Synchronous/Bit Synchronous Mode
Bit Rate
(bps)
2.4576
f_CLK (MHz)
3.072
TMC BR Deviation (%) TMC BR Deviation (%) TMC BR
38400 32 1 0.00
40 1 0.00
52 1
19200 32 2 0.00
40 2 0.00
52 2
9600 32 3 0.00
40 3 0.00
52 3
4800 32 4 0.00
40 4 0.00
52 4
2400 32 5 0.00
40 5 0.00
52 5
1200 32 6 0.00
40 6 0.00
52 6
600 32 7 0.00
40 7 0.00
52 7
300 32 8 0.00
40 8 0.00
52 8
4
Deviation (%)
0.16
0.16
0.16
0.16
0.16
0.16
0.16
0.16
f_CLK (MHz)
Bit Rate
4.608
4.9152
6
(bps)
TMC BR Deviation (%) TMC BR Deviation (%) TMC BR Deviation (%)
38400 60 1 0.00
64 1 0.00
78 1 0.16
19200 60 2 0.00
64 2 0.00
78 2 0.16
9600 60 3 0.00
64 3 0.00
78 3 0.16
4800 60 4 0.00
64 4 0.00
78 4 0.16
2400 60 5 0.00
64 5 0.00
78 5 0.16
1200 60 6 0.00
64 6 0.00
78 6 0.16
600 60 7 0.00
64 7 0.00
78 7 0.16
300 60 8 0.00
64 8 0.00
78 8 0.16
TMC: Value of the TMC7−TMC0 bits of TMC
BR: Value of the TXBR3−TXBR0 bits of TXS or the RXBR3−RXBR0 bits of RXS
Rev. 0, 07/98, page 233 of 453