HD64570 Datasheet, PDF (154/469 Pages) Hitachi Semiconductor – Serial Communications Adaptor

Bit 3 (CCTS: CTS Line Level Change): Indicates whether or not the CTS line level has
changed. This bit is cleared when 1 is written to this bit position.
• Asynchronous/Byte synchronous/Bit synchronous mode
CCTS = 0: Indicates that the CTS line level has not changed
CCTS = 1: Indicates that the CTS line level has changed
Bit 2 (CDCD: DCD Line Level Change): Indicates whether or not the DCD line level has
changed. This bit is cleared when 1 is written to this bit position.
• Asynchronous/Byte synchronous/Bit synchronous mode
CDCD = 0: Indicates that the DCD line level has not changed
CDCD = 1: Indicates that the DCD line level has changed
Bit 1 (BRKD/ABTD: Break Start Detection/Abort Detection): Indicates the detection of a
break start (space state) in asynchronous mode or an abort in bit synchronous HDLC mode. This
bit is cleared when 1 is written to this bit position.
• Asynchronous mode
BRKD = 0: Indicates that no break start has been detected
BRKD = 1: Indicates that a break start has been detected
• Byte synchronous mode
Reserved. This bit always reads 0 and can be set to 0 or 1.
• Bit synchronous mode
ABTD = 0: Indicates that no abort has been detected
ABTD = 1: Indicates that an abort has been detected in bit synchronous HDLC mode
Bit 0 (BRKE/IDLD: Break End Detection/Idle Start Detection): Indicates the detection of a
break end in asynchronous mode, or an idle start in bit synchronous mode. This bit is cleared
when 1 is written to this bit position.
• Asynchronous mode
BRKE = 0: Indicates that no break end has been detected
BRKE = 1: Indicates that a break end has been detected
• Byte synchronous mode
Reserved. This bit always reads 0 and can be set to 0 or 1.
• Bit synchronous mode
IDLD = 0: Indicates that no idle start has been detected
IDLD = 1: Indicates that an idle start has been detected
Rev. 0, 07/98, page 138 of 453