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HD64570 Datasheet, PDF (180/469 Pages) Hitachi Semiconductor – Serial Communications Adaptor
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TRBH Bits 7−0 (TRB15−TRB8/TRBH7−TRBH0: TX/RX Buffer High Byte (TRBH)): The
function of these bits is described below.
• Asynchronous/Byte synchronous/Bit synchronous mode
Reading TRBH bits 7−0 reads a receive character from the receive buffer. If data is read from
these bits with the RXRDY bit of status register 0 (ST0) cleared to 0, the values are undefined
and subsequent operation is not guaranteed.
Writing TRBH bits 7−0 writes a transmit character to the transmit buffer. If data is written to
these bits with the TXRDY bit of ST0 cleared to 0, the write data and/or the data in the
transmit buffer may be lost.
TRBL Bits 7−0 (TRB7−TRB0/TRBL7−TRBL0: TX/RX Buffer Low Byte (TRBL)): The
function of these bits is described below.
• Asynchronous/Byte synchronous/Bit synchronous mode
Reading TRBL bits 7−0 reads a receive character from the receive buffer. If data is read from
these bits, with the RXRDY bit of ST0 cleared to 0, the values are undefined and subsequent
operation is not guaranteed.
Writing TRBL bits 7−0 writes a transmit character to the transmit buffer. If data is written to
these bits, with the TXRDY bit of ST0 cleared to 0, the write data and/or the data in the
transmit buffer may be lost.
TRB read operation: Data is read from the receive buffer at TRB read in the procedure listed in
table 5.6 to table 5.8.
Table 5.6 TRB Read Operation in CPU Mode 0
Read Mode
Word read
Byte read
Accessed Register*2
TRBH
TRBL
TRBH
TRBL
Data Byte Count in Receive Buffer*1
2 or More Bytes 1 Byte
None
Data 1*3
Undefined*4 Undefined*4
Data 0*3
Data 0*3
Undefined*4
Data 0*3
Data 0*3
Undefined*4
Data 0*3
Data 0*3
Undefined*4
Table 5.7 TRB Read Operation in CPU Mode 1
Read Mode
Byte read
Accessed Register*2
TRBH
TRBL
Data Byte Count in Receive Buffer*1
2 or More Bytes 1 Byte
None
Data 0*3
Data 0*3
Undefined*4
Data 0*3
Data 0*3
Undefined*4
Rev. 0, 07/98, page 164 of 453
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