HD64570 Datasheet, PDF (435/469 Pages) Hitachi Semiconductor – Serial Communications Adaptor

Register
MSCI (Channel 1)
MSCI Interrupt Enable
Register 1 Channel 1:
IE1 Channel 1
Address
CPU CPU
Mode Mode
0, 1 2, 3 Remarks
49H 48H
Async
7
6
5
— IDLE —
4
3
2
1
0
— CCTSECDCDEBRKDEBRKEE
Byte sync UDRNE
CLMDE SYNCDE
——
Bit sync HDLC
FLGDE
ABTDE IDLDE
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial value
0
0
0
0
0
0
0
0
CLMD interrupt enable
0: Disable
1: Enable
IDL interrupt enable
0: Disable
1: Enable
UDRN interrupt enable
• Byte/Bit synchronous mode
0: Disable
1: Enable
SYNCD interrupt enable
• Byte synchronous mode
0: Disable
1: Enable
FLGD interrupt enable
• Bit synchronous mode
0: Disable
1: Enable
CCTS interrupt
enable
0: Disable
1: Enable
CDCD interrupt enable
0: Disable
1: Enable
BRKD interrupt enable
• Asynchronous mode
0: Disable
1: Enable
ABTD interrupt enable
• Bit sychronous mode
0: Disable
1: Enable
BRKE interruput enable
• Asynchronous mode
0: Disable
1: Enable
IDLD interrupt enable
• Bit synchronous mode
0: Disable
1: Enable
Rev. 0, 07/98, page 419 of 453