HD64570 Datasheet, PDF (404/469 Pages) Hitachi Semiconductor – Serial Communications Adaptor

CLK
HOLD
t_HLDD
t_HLAS
HOLDA
t _BEOD
BEO
t _BSYD
BUSY
(Out)
t _BSYS
BUSY
(In)
Note: This figure merely defines the symbols for AC timing; see figure 3.6 for specific
bus arbitration timing.
Figure 10.12 CPU Mode 0 Bus Arbitration Timing
Rev. 0, 07/98, page 388 of 453