HD64570 Datasheet, PDF (398/469 Pages) Hitachi Semiconductor – Serial Communications Adaptor

CLK
t _CL2CL1
BHE, A₀
A₁ – A₂₃
AS (ME)
WAIT
T₁
T₂
T_W
t _CLCH t _CHCL
t _CH1CH2
t _CLCL
t _CLAV
t _CHLL
t _AVAL
t _ASWH
t _RYLCL
t _ASWL
t _CHRYX
t _RYHCH
T₃
t _CLLH t _LLAX
t _CHRYX
WR
D₀ – D₁₅
t _CVCTV
t _CLDV t _DVWL
t _WLWH
t _CVCTX
t _CHDX
t _WHDX
Figure 10.6 Master Mode Write Timing
(CPU Mode 0) (SCA ‡ Memory)
Rev. 0, 07/98, page 382 of 453