HD64570 Datasheet, PDF (59/469 Pages) Hitachi Semiconductor – Serial Communications Adaptor

2.2 Pin Functions
The function of each signal line is described below. Note that permanent or temporary input lines
must never be left unconnected.
Table 2.1 Power Supply
Pin Number
Input/
Output
Symbol CP-84
FP-88
Description
V_CC
21, 22, 44, 65,10, 33, 34 Input +5 V power supply: All VCC pins must be
83
57, 79
connected to the system power supply (+5 V).
V_SS
1, 7, 19, 35, 12, 18, 31, Input Ground: All VSS pins must be connected to the
46, 54, 63 48, 59, 68,
system ground (0 V).
77
Note: To minimize potential differences in the chip, use the shortest possible lead length to the
V_CC pins and V_SS pins.
Table 2.2 Clock
Pin Number
Symbol
CLK
CP-84
84
FP-88
11
Input/
Output
Description
Input
System clock input: The input is reshaped on
chip and used as the φ clock.
Table 2.3 Reset Line
Pin Number
Symbol
RESET
CP-84
2
FP-88
13
Input/
Output
Description
Input
Reset: When this line is driven active low for 6
or more clock cycles, the SCA enters reset
mode. All functional modules are reset.
Rev. 0, 07/98, page 43 of 453