HD64570 Datasheet, PDF (281/469 Pages) Hitachi Semiconductor – Serial Communications Adaptor

6.4 Operating Modes
6.4.1 Overview
The DMAC supports single-block transfer mode (single address) and chained-block transfer mode
(single address). Each transfer mode is summarized in table 6.3.
Single-block transfer mode is available in asynchronous, byte synchronous, and bit synchronous
modes. Chained-block transfer mode is available only in bit synchronous mode. (Normal
operation is not guaranteed in asynchronous or byte synchronous mode.)
The DMAC supports byte transfer in CPU mode 1 (8-bit MPUs of the HD64180 family) and word
transfer in CPU modes 0, 2, and 3 (16-bit MPUs). In CPU modes 0, 2, and 3, the DMAC begins
transferring a word of data after transferring one byte of data when the start address of the data
buffer in memory is odd.
Rev. 0, 07/98, page 265 of 453