HD64570 Datasheet, PDF (34/469 Pages) Hitachi Semiconductor – Serial Communications Adaptor

1.7.3 Transmission Error Detection
The SCA flags the following transmission errors in its status registers (ST1 and ST2) to notify the
host MPU:
1. Parity error (asynchronous)
This error occurs when the designated parity condition is not satisfied. It indicates that an
incorrect bit (possibly the parity bit) was received.
2. Framing error (asynchronous)
This error occurs if the RXD input is low (space) in the position of the first stop bit.
3. CRC error (byte synchronous or bit synchronous)
This error occurs if the correct CRC value is not obtained, indicating that a bit error occurred
on the transmission line.
4. Overrun error (asynchronous, byte synchronous, or bit synchronous)
This error occurs if receive data are sent to the receive FIFO when the receive FIFO is full.
After an overrun error, new receive data are overwritten on the last byte in the receive FIFO,
destroying the preceding receive data but protecting other data already received.
5. Underrun error (byte synchronous or bit synchronous)
This error occurs if the transmit FIFO is empty after transmission of the data in the transmit
shift register.
Rev. 0, 07/98, page 18 of 453