English
Language : 

HD64570 Datasheet, PDF (49/469 Pages) Hitachi Semiconductor – Serial Communications Adaptor
1.7.10 DMA Buffer Chaining
In bit-synchronous mode, each DMAC channel in the SCA can perform chained-block transfer, in
which one or more data blocks are transferred in a continuous sequence (figure 1.21).
To set up a chained-block transfer:
1. Create one or more descriptors in memory. A descriptor is a string of data giving the starting
address of a data buffer (data block), the data length, the starting address of the next descriptor,
and other information.
2. Write the starting address of the first descriptor in a DMAC register.
3. Set necessary values in other DMAC registers.
4. Enable the corresponding DMA channel.
On the DMA request from the MSCI, the DMAC will automatically fetch the first descriptor and
begin chained-block transfer.
SCA
DMAC registers
Starting *
address of first
descriptor
Address space
Starting
address of
next descriptor
Starting
address of
data buffer
Data length n 0
n1
n2
n3
First descriptor Second descriptor Third descriptor Fourth descriptor
Data
length n 0
n1
n2
n3
First data buffer Second data buffer Third data buffer Fourth data buffer
* Chain pointer base (CPB) + current descriptor address register (CDA)
Figure 1.21 DMA Buffer Chaining
Rev. 0, 07/98, page 33 of 453