HD64570 Datasheet, PDF (337/469 Pages) Hitachi Semiconductor – Serial Communications Adaptor

Bit name
Read/Write
Initial value
7
6
5
4
3
2
1
0
— — — — — PALW2PALW1 PALW0
— — — — — R/W R/W R/W
0
0
0
0
0
1
1
1
PAL area wait
Note: Bit 7 to bit 3 are reserved. These bits always read 0 and must be set to 0.
Bits 7−3: Reserved. These bits always read 0 and must be set to 0.
Bits 2−0 (PALW2−PALW0: PAL Area Wait): The functions of these bits are described below.
PALW2, PALW1, PALW0 = 0, 0, 0: Number of wait states = 0
PALW2, PALW1, PALW0 = 0, 0, 1: Number of wait states = 1
PALW2, PALW1, PALW0 = 0, 1, 0: Number of wait states = 2
PALW2, PALW1, PALW0 = 0, 1, 1: Number of wait states = 3
PALW2, PALW1, PALW0 = 1, 0, 0: Number of wait states = 4
PALW2, PALW1, PALW0 = 1, 0, 1: Number of wait states = 5
PALW2, PALW1, PALW0 = 1, 1, 0: Number of wait states = 6
PALW2, PALW1, PALW0 = 1, 1, 1: Number of wait states = 7
Note that PALW2, PALW1, and PALW0 are initialized to (1, 1, 1) at reset.
Rev. 0, 07/98, page 321 of 453