HD64570 Datasheet, PDF (128/469 Pages) Hitachi Semiconductor – Serial Communications Adaptor

7
6
5
4
3
2
1
0
Async
BRATE1BRATE0TXCHR1TXCHRR0 XCHRR1XCHR0PMPM1PMPM0
Byte sync
—^* —^* —^* —^* —^* —^* —^* —^*
Bit sync HDLC ADDRSA1DDRS0
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Initial value
0
0
0
0
0
0
0
0
Bit rate
• Asynchronous mode
00: 1/1 clock rate
01: 1/16 clock rate
10: 1/32 clock rate
11: 1/64 clock rate
Transmit character
length
• Asynchronous mode
00: 8 bits/character
01: 7 bits/character
10: 6 bits/character
11: 5 bits/character
Address field check
• Bit synchronous mode
00: Address field no-check
01: Single address 1
10: Single address 2 ^*2
11: Dual address
Receive character
length
• Asynchronous mode
00: 8 bits/character
01: 7 bits/character
10: 6 bits/character
11: 5 bits/character
Parity/multiprocessor
mode
• Asynchronous mode
00: No parity/MP bit
01: MP bit appended (by command)
10: Even parity appended and checked
11: Odd parity appended and checked
Note: Reserved. These bits always read 0 and must be set to 0.
Rev. 0, 07/98, page 112 of 453