HD64570 Datasheet, PDF (420/469 Pages) Hitachi Semiconductor – Serial Communications Adaptor

Address
Register
CPU CPU
Mode Mode
0, 1 2, 3 Remarks
MSCI (Channel 0)
MSCI Status Register 1
23H 22H
Channel 0: ST1 Channel 0
Async
7
6
— IDL
Byte sync
UDRN
Bit sync HDLC
Read/Write R/W R
Initial value
0
0
5
4
3
2
1
0
— — CCTS CDCD BRKD BRKE
CLMD SYNCD
——
FLGD
ABTD IDLD
R/W R/W R/W R/W R/W R/W
0
0
0
0
0
0
CTS line
level change
0: Not changed
1: Changed
SYN pattern detection
• Byte synchronous mode
0: No pattern detected
1: Pattern detected
Flag detection
• Bit synchronous mode
0: No flag detected
1: Flag detected
2 clock missing detection
• Byte/Bit synchronous mode
0: No 2 clock missing detected
1: 2 clock missing detected
Transmitter idle status
0: Not idle
1: Idle
Underrun error
• Byte/Bit synchronous mode
0: No underrun detected
1: Underrun detected
DCD line
level change
0: Not changed
1: Changed
Break detection
• Asynchronous mode
0: Break sequence
starts not detected
1: Break sequence
starts detected
Abort detection
• Bit synchronous mode
0: Abort sequence start not
detected
1: Abort sequence start
detected
Break end
• Asynchronous mode
0: Break sequence end not detected
1: Break sequence end detected
Idle start detection
• Bit synchronous mode
0: Idle sequence start not detected
1: Idle sequence start detected
Rev. 0, 07/98, page 404 of 453